METHOD OF FORMING VIA IN SEMICONDUCTOR DEVICE

摘要

A method for forming a via of a semiconductor device is provided to improve reliability of a wiring by securing an aligning margin of the via and an upper wire. A first interlayer dielectric(101) is formed on a semiconductor substrate(100). The first interlayer dielectric includes a lower wire(102). The lower wire is formed to be extended to an x direction or a y direction. An etch stop layer(103) and an second interlayer dielectric(104) are formed on the first interlayer dielectric. A photoresist layer pattern is formed on the second interlayer dielectric. The photoresist layer pattern defines a circular via hole forming region expanded along an expanding direction of the lower wire. The second interlayer dielectric and the etch stop layer are sequentially etched by using the photoresist layer pattern as an etching mask to form a via hole exposing an upper surface of the lower wire. A conductive material is gap-filled in the via hole to form a via(107a).