发明名称 FORWARDED CLOCK FILTERING
摘要 A forwarded clock filtering method is provided to reduce frequency jitter due to channel loss, a common mode noise, and a power supply noise. Data is exchanged between devices(102,104). A transmitter(106) and a receiver(108) are provided in one data communication direction. The device includes a portion of a computer system having a microprocessor(103) and a chip set(105). A clock unit(110) supplies a clock signal to the transmitter. The clock unit supplies the clock signal to a clock generator unit on the device. The clock signal transmitted from the first to second devices is synchronized with the data signal transmitted from the second to first devices. The clock generator unit(112) receives the clock signal from the first device and provides the clock signal to the receiver through a parallel bus(114).
申请公布号 KR20070072430(A) 申请公布日期 2007.07.04
申请号 KR20070000218 申请日期 2007.01.02
申请人 INTEL CORP. 发明人 CASPER BRYAN K.;HOLLIS TIMOTHY;JAUSSI JAMES E.;MOONEY STEPHEN R.;O'MAHONY FRANK;MANSURI MOZHGAN
分类号 H03H17/00;H03K19/0175 主分类号 H03H17/00
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