| 摘要 |
A method for forming a semiconductor apparatus is provided to prevent a short circuit, increment of wiring contact resistance and a void generation by a metal which is etched with remaining fluorine component around the wiring connect area. An etch-stop barrier(30) and an interlayer dielectric are formed sequentially on a substrate(10) where a lower metal line is formed. A via hole(50) exposing the etch-stop barrier is formed by etching the interlayer dielectric. An isotropic dry etching is performed to expose a part of the lower metal line by an etchant containing fluorine about the etch-stop barrier exposed by the via hole. The exposed via hole is filled by laminating metal layers for an upper wiring.
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