发明名称 Detecting short circuits within an integrated circuit design
摘要 In one embodiment, the present invention includes a method for obtaining a physical layout for an integrated circuit (IC) design of a substrate having at least one of an n-well and a deep n-well; and extracting a layout netlist for the IC design from the physical layout by identifying the substrate as a single region. In such manner, short circuits isolated by the n-well or the deep n-well can be detected.
申请公布号 US7240312(B2) 申请公布日期 2007.07.03
申请号 US20050086964 申请日期 2005.03.22
申请人 SILICON LABORATORIES INC. 发明人 DANG VINCENT;LEVANTI HARRY A.
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
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