发明名称 Data access and address translation for retrieval of data amongst multiple interconnected access nodes
摘要 A low-latency storage memory system is built from multiple memory units such as high-density random access memory. Multiple access ports provide access to memory units and send the resultant data out interface ports. The memory units communicate with the access ports through an interconnected mesh to allow any access port to access any memory unit. An address virtualization mechanism using address translators allows any access port of the memory storage system to access requested data as abstract objects without regard for the physical memory unit that the data is located in, or the absolute memory addresses within that memory unit.
申请公布号 US7240143(B1) 申请公布日期 2007.07.03
申请号 US20030730748 申请日期 2003.12.08
申请人 BROADBUS TECHNOLOGIES, INC. 发明人 SCHEFFLER ROBERT G.;KAHN MICHAEL A.;STIFTER FRANK J.
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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