| 摘要 |
A finite GF converter is provided to minimize whole circuit area with the reduced number of circuits by using one reference value capable of replacing a huge number of circuits and performing 7 kinds of operations, and using the circuit optimizing parallel square and parallel quadruple manipulation. A reference value operator(42) generates the reference values by using only the top 5-bit data among the 8-bit data. A parallel square and quadruple multiplier(43,44) operates a part of an output signal among an input value received from the reference value operator. The first multiplexer(46) outputs one output signal by using the output signal of the reference value operator, the parallel square multiplier, and the parallel quadruple multiplier as the input signal. The second multiplexer(49) outputs the final conversion value by using eight signals of the output signal of the first multiplexer and seven doublers(48) as the input signal.
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