发明名称 Erasing method for non-volatile memory
摘要 An erasing method for a non-volatile memory is provided. The method includes the following two major steps. (a) A first voltage is applied to the odd-numbered select gates of each memory row and a second voltage is applied to the even-numbered select gates of each memory row such that the voltage difference between the first voltage and the second voltage is large enough for the electrons injected into the floating gate of the memory cells to be removed via the select gate. (b) A switchover operation is performed so that the first voltage is applied to the even-numbered select gates of each memory row and the second voltage is applied to the odd-numbered select gates of each memory row such that the electrons injected into the floating gates of the memory cells are pulled away via the select gates to turn the memory cells into an erased state.
申请公布号 US7239555(B1) 申请公布日期 2007.07.03
申请号 US20060308018 申请日期 2006.03.03
申请人 POWERCHIP SEMICONDUCTOR CORP. 发明人 WANG KUO-TUNG;PAN YEN-LEE;CHU KUO-HAO;HSU CHENG-YUAN
分类号 G11C16/04 主分类号 G11C16/04
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