| 摘要 |
A voltage down converting circuit of a semiconductor memory device is provided to stabilize operation of the memory device by reducing the variation in an internal voltage, even when an external voltage is varied. A voltage down converting circuit of a semiconductor memory device includes a clamping unit(100) and a voltage down converter(200). The clamping unit clamps an external supply voltage in response to a first internal voltage input and outputs the result. The voltage down converter uses the clamped voltage as a source voltage. The first internal voltage is a high voltage, which is formed by pumping up the external supply voltage. The clamping unit is a first NMOS(Negative Metal Oxide Semiconductor) transistor(N1), which receives the first interval voltage at a gate thereof. The clamping unit further includes a second NMOS transistor(N2).
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