| 摘要 |
A method for forming a floating gate of a flash memory device is provided to reduce a variation of a threshold voltage in repeated programming and erasing processes by decreasing the grain size of a floating gate. A first undoped polysilicon layer(13) having a small grain size is formed on a tunnel oxide layer(12) of a semiconductor substrate(11). A first insulation layer(14) is formed on the first undoped polysilicon layer. A second undoped polysilicon layer(15) having a small grain size is formed on the first insulation layer. A second insulation layer(16) is formed on the second undoped polysilicon layer. A third undoped polysilicon layer(17) having a small grain size is formed on the second insulation layer. A doped polysilicon layer(18) having a great grain size is formed on the third undoped polysilicon layer.
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