发明名称 |
MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING DATA TRANSMISSION MODE BETWEEN PORTS |
摘要 |
A semiconductor memory device including a plurality of ports, at least one shared memory region of a memory cell array accessible through the ports, and a data transmission controller coupled to the shared memory region and the ports. The data transmission controller is configured to apply a read command of a read operation to the shared memory region after a write command of a write operation before applying any other commands to the shared memory region when at least a portion of a write address associated with the write operation and at least a portion of a read address associated with the read operation are substantially equivalent.
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申请公布号 |
US2007150666(A1) |
申请公布日期 |
2007.06.28 |
申请号 |
US20060466406 |
申请日期 |
2006.08.22 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HWANG HYONG-RYOL;PARK SANG-KYUN |
分类号 |
G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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