发明名称 Using asymmetric lanes dynamically in a multi-lane serial link
摘要 A method, device, and system are disclosed. In one embodiment, the method comprises transitioning one or more lanes of a multi-lane serial link from a fully operational power state to a low power state and keeping one or more other lanes of the multi-lane serial link in the fully operational power state to allow one or more data transfers across the remaining operational lanes in the link.
申请公布号 US2007150762(A1) 申请公布日期 2007.06.28
申请号 US20050321116 申请日期 2005.12.28
申请人 SHARMA DEBENDRA D;BHATT AJAY V 发明人 SHARMA DEBENDRA D.;BHATT AJAY V.
分类号 G06F1/00 主分类号 G06F1/00
代理机构 代理人
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