发明名称 |
Clock deskewing method, apparatus, and system |
摘要 |
An integrated circuit includes clock deskew circuitry. The deskew circuitry includes a loop circuit to align an input clock signal with an output clock signal, and also aligns transmitted data with the output clock signal.
|
申请公布号 |
US2007149142(A1) |
申请公布日期 |
2007.06.28 |
申请号 |
US20050318118 |
申请日期 |
2005.12.23 |
申请人 |
INTEL CORPORATION |
发明人 |
LAW HON-MO R.;RASHID MAMUN U.;MARTIN AARON K. |
分类号 |
H04B1/40;H04B1/06;H04B7/00 |
主分类号 |
H04B1/40 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|