发明名称 Receive clock deskewing method, apparatus, and system
摘要 An integrated circuit includes clock deskew circuitry. The deskew circuitry includes multiple loop circuits to align a received clock with a data eye, and to reduce the effects of clock drift caused by voltage and temperature variations.
申请公布号 US2007146035(A1) 申请公布日期 2007.06.28
申请号 US20050319689 申请日期 2005.12.28
申请人 INTEL CORPORATION 发明人 LAW HON-MO R.;RASHID MAMUN U.;MARTIN AARON K.
分类号 H03K5/13 主分类号 H03K5/13
代理机构 代理人
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