发明名称 |
Method to control delay between lanes |
摘要 |
Method and apparatus to control delay between lanes in an I/O interface is disclosed. To control the delay between the lanes in the I/O system a programmed delay may be determined and introduced between the lanes. For this purpose the effective time "T" of the lanes is determined. The number of lanes "N" in the I/O interface is identified. The programmed lane to lane delay "D" is determined and a delay circuit having the programmed delay may be introduced between the lanes to reduce AC peak to peak noise in the I/O system.
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申请公布号 |
US2007150197(A1) |
申请公布日期 |
2007.06.28 |
申请号 |
US20050322059 |
申请日期 |
2005.12.28 |
申请人 |
VENKATARAMAN SRIKRISHNAN;KAR JAYASHREE;SOLANKI SUDARSHAN D;PATEL P R;DESMITH MICHAEL M;FIGUEROA DAVID G |
发明人 |
VENKATARAMAN SRIKRISHNAN;KAR JAYASHREE;SOLANKI SUDARSHAN D.;PATEL P. R.;DESMITH MICHAEL M.;FIGUEROA DAVID G. |
分类号 |
G08G1/16 |
主分类号 |
G08G1/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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