发明名称 Bandwidth enhancement by time interleaving multiple digital to analog converters
摘要 A digital-to-analog converting system for producing an interleaved analog signal with enhanced bandwidth includes a first digital-to-analog converter for receiving a first digital data stream and converting the first digital data stream to a first analog signal and a second digital-to-analog converter for receiving a second digital data stream and converting the second digital data stream to a second analog signal. The digital-to-analog converting system is clocked by a clock signal having a clock period, and further includes first timing circuitry for receiving the first analog signal and outputting the first analog signal for a first half of the clock period and second timing circuitry for receiving the second analog signal and outputting the second analog signal for a second half of the clock period to produce the interleaved analog signal.
申请公布号 US2007146186(A1) 申请公布日期 2007.06.28
申请号 US20050315406 申请日期 2005.12.22
申请人 JUNGERMAN ROGER L;CORREDOURA PAUL L 发明人 JUNGERMAN ROGER L.;CORREDOURA PAUL L.
分类号 H03M1/66 主分类号 H03M1/66
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