| 摘要 |
A circuit for controlling an internal voltage of a semiconductor memory apparatus including a deep power down signal input unit, which receives a deep power down signal indicating that a deep power down mode is starting, and supplies the received signal to a level shifter; and one or more level shifters, each of which performs level shifting from a first voltage to a second voltage or sinks the second voltage to a ground voltage in response to the input of the deep power down signal.
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