发明名称 MEMORY DEVICE AND METHOD OF ARRANGING SIGNAL AND POWER LINES
摘要 A memory device and method for arranging signal and power lines includes a plurality of sub-memory cell arrays having a plurality of memory cells, a plurality of sense amplifiers to sense and amplify data from the plurality of memory cells, a plurality of power lines to provide power to the sense amplifiers, where at least one of the power lines is disposed over a first set of the sense amplifiers and the sub-memory cell arrays, and at least another one of the power lines is disposed over second set of the sense amplifiers and the sub-memory cell arrays.
申请公布号 US2007147101(A1) 申请公布日期 2007.06.28
申请号 US20060567655 申请日期 2006.12.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHAE BONG-SEOK
分类号 G11C5/06 主分类号 G11C5/06
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