发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT AND MEMORY SYSTEM, AND CLOCK SIGNAL SETTING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and a memory system, and a clock signal setting method by which a margin between the edge position of a clock whose phase is shifted and the logical change position of a data signal is improved. SOLUTION: The semiconductor integrated circuit is provided with: a phase shift amount determination means for determining the amount of phase shift of the clock used for latching data when the data is read from a memory; a clock generation means for generating the clock on the basis of the amount of phase shift; and a phase shift amount setting means for reading the preliminarily written data from the memory using the clock, determining whether or not the read data matches the written data to set the amount of phase shift of the clock on the basis of its decision results. COPYRIGHT: (C)2007,JPO&INPIT
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申请公布号 |
JP2007164697(A) |
申请公布日期 |
2007.06.28 |
申请号 |
JP20050363410 |
申请日期 |
2005.12.16 |
申请人 |
SHINKO ELECTRIC IND CO LTD |
发明人 |
DENDA TATSUAKI |
分类号 |
G06F12/00;G11C11/407;G11C11/4076 |
主分类号 |
G06F12/00 |
代理机构 |
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