发明名称 LSI WITH MIXEDLY-LOADED MEMORY/LOGIC AND ITS TEST METHOD
摘要 PROBLEM TO BE SOLVED: To test a built-in memory and a logic block in an LSI with a mixedly-loaded memory/logic by using a memory tester. SOLUTION: A test operation is designated by a switching signal NR/TE, to thereby switch transfer switches 3-7 to the terminal T side, and a test mode A is designated by the switching signal TA/TB, to thereby switch a transfer switch 8 to the terminal A side. Test input data are inputted from an input terminal 11 and stored in a FIFO memory 2. Then, a test mode B is designated by the switching signal TA/TB, to thereby switch the transfer switch 8 to the terminal B side, and the test input data are read out from the FIFO memory 2 and imparted to the logic block 1, and a processing result outputted from the logic block 1 is stored in the FIFO memory 2 as test output data. Thereafter, the test output data in the FIFO memory 2 are read out after returning to the test mode A, and outputted from an output terminal 12, and the data are compared with expected value data, to thereby determine acceptance. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007163269(A) 申请公布日期 2007.06.28
申请号 JP20050359204 申请日期 2005.12.13
申请人 OKI ELECTRIC IND CO LTD 发明人 MIZUHASHI HIROSHI;YAMAMOTO TOYOAKI;YAMADA HITOSHI;KIMURA YOSHINOBU
分类号 G01R31/28;G01R31/317;H01L21/822;H01L27/04 主分类号 G01R31/28
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