Package having exposed integrated circuit device

摘要

A package ( 10 ) includes an integrated circuit device ( 12 ) having an electrically active surface ( 16 ) and an opposing backside surface ( 14 ). A dielectric molding resin ( 26 ) at least partially encapsulates the integrated circuit die and the plurality of electrically conductive leads ( 20 ) with the backside surface ( 14 ) and the plurality of electrical contacts ( 24 ) being exposed on opposing sides of the package ( 10 ). Features ( 30 ) are formed into electrically inactive portions of the integrated circuit die ( 12 ) to seal moisture paths and relieve packaging stress. The features ( 30 ) are formed by forming a trough ( 54 ) partially through the backside ( 56 ) of the wafer ( 40 ) in alignment with a saw street ( 48 ), the trough ( 54 ) having a first width; and forming a channel ( 62 ) extending from the trough ( 54 ) to the electrically active face ( 42 ) to thereby singulate the integrated circuit device member, the channel ( 62 ) having a second width that is less than the first width.