MAJORITY VOTER CIRCUIT AND DATA BUS INVERSION CIRCUIT AND SEMICONDUCTOR DEVICE

摘要

A majority voter circuit, a data bus inversion circuit and a semiconductor device are provided to enable robust circuit design with reduced operation errors due to impedance mismatch with an external device by comparing an odd number of bits except a fixed number of bits in data. An input part is connected between a common node and each of a first node and a second node, and generates voltage difference between the first node and the second node by receiving data of an odd number of bits and inverted data of an odd number of bits. An amplification part is connected between a first power supply voltage and the first node and the second node, and senses and amplifies the voltage difference between the first node and the second node, and outputs a selection signal by performing majority voting by comparing the number of bits having "0" with the number of bits having "1".