CLOCK NOISE CANCELLATION CIRCUIT

摘要

A circuit for eliminating a clock noise is provided to reduce influence had on other parts or signals by a harmonic component of the clock noise and to substitute for an EMI filter. A circuit for eliminating a clock noise includes a signal coupler(510), a harmonic selecting filter(520), a phase converter(530), an AGC(Automatic Gain Control) amplifier(540), a coupler(550), a power detector(560), and a noise eliminating controller(570). The signal coupler(510) extracts a part from a clock signal. The harmonic selecting filter(520) selects a harmonic component of a preset frequency among signals from the signal coupler(510). The phase converter(530) reverses a phase of the harmonic component of the preset frequency among the signals from the harmonic selecting filter(520). The AGC amplifier(540) amplifies signals from the phase converter(530) according to a gain control. The coupler(550) couples the clock signal with the signals from the phase converter(530) and eliminates the harmonic component of the preset frequency included in the clock signal. The power detector(560) detects power of the harmonic component of the preset frequency among the signals outputted by the coupler(550). The noise eliminating controller(570) controls a gain of the AGC amplifier(540) based on a level of the harmonic component detected by the power detector(560).