| 摘要 |
A system, including a data regenerator, for converting split phase Manchester encoded binary data into NRZ data and for generating clock pulses which are synchronized with the NRZ data is disclosed. MOS FETs are used throughout the system. The data regenerator includes two transition detectors which detect logic 0 level to logic 1 level transitions in the split phase Manchester encoded data and in its complement, and produce pulses in response to the detected transitions. The data regenerator also includes four gates which are controlled by the output of a delay unit. The delay unit is activated by the output of a bit time pulse generator, which responds to the outputs of two of the four gates. When the gates are enabled, a pulse from a transition detector passes through one of these two gates to the bit time pulse generator, causing the latter to produce a pulse which activates the delay unit. The total delay provided by the pulse generator and the delay unit is such that the output of the delay unit disables the gates for at least 1/2 bit period, after which the gates are again enabled to respond to a subsequent pulse from one of the detectors. The pulse generator thus provides a sequence of pulses which are synchronized with mid bit time transitions in the Manchester encoded data. Output pulses from one of the other two of the four gates are applied to the set input to a flip-flop, while the output pulses from the other of these two gates are applied to the reset input to the flip-flop, the output of which represents the regenerated NRZ data.
|
