| 摘要 |
A semiconductor device is provided to perform a fabricating process by a variation of a mask process without using an additional process by forming a gate pad when a metal interconnection is formed. A well region is formed in a substrate. An STI layer is formed in the well region to define an active region and a field region. A drift region is formed in the well region corresponding to the active region. A gate electrode(123) is formed on the substrate between the drift regions, not overlapping the drift region, including a gate insulation layer and a gate conductive layer. The gate insulation layer is formed on the substrate between the drift regions, not overlapping the drift region. The gate conductive layer is formed on the gate insulation layer, separated from both sides of the gate insulation layer by a predetermined interval. A source/drain region(127a,127b) is formed in the drift region, separated from the gate electrode by a predetermined interval. An insulation layer is formed on the substrate to cover the gate electrode. A gate pad(132d) is formed on the insulation layer to overlap the drift region between the source/drain region and the gate electrode, electrically connected to the gate electrode.
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