发明名称 METHOD FOR FORMING THE ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 A method for fabricating an isolation layer in a semiconductor device is provided to avoid generation of a moat by rounding the corner of an interface between an active region and an isolation region and by preventing a gap-fill oxide layer from being lost. A pad oxide layer(110) and a pad nitride layer are sequentially stacked on a silicon substrate(100) to form a pad pattern for defining an isolation region. A predetermined depth of the silicon substrate is etched to form a trench by using the pad pattern as an etch mask. A part of the pad oxide layer exposed through the trench is removed by a first blanket etch-back process using an HF solution as an etch solution. The pad nitride layer is removed by a second blanket etch-back process using an H3PO4 solution as an etch solution to expose a part of the end part of the pad oxide layer remaining after the first blanket etch-back process. The upper corner of the trench exposed through the residual pad oxide layer is rounded by a light etch process. A rounding oxide process is performed on the resultant structure to form a round oxide layer(140) on the inner wall of the trench. A gap-fill oxide layer(150) is filled in the trench having the round oxide layer.
申请公布号 KR20070066027(A) 申请公布日期 2007.06.27
申请号 KR20050126719 申请日期 2005.12.21
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 LEE, KWANG HO
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
主权项
地址