| 摘要 |
Precharge arrangement for read access for integrated nonvolatile memories having at least one memory cell ( 2 ), at least one source line ( 8 ), at least one bit line ( 9 ), at least one sense amplifier ( 3 ) and at least one precharge potential, the bit line ( 9 ) continuously having the precharge potential in a deselected state of the bit line ( 9 ), and the source line ( 8 ) having a predetermined reference potential, in particular a ground potential ( 10 ), in a selected state of the bit line ( 9 ).
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