发明名称 Fabrication method of semiconductor integrated circuit device
摘要 Any damage inflicted on test pads, inter-layer insulating films, semiconductor elements or wiring at the time of electrical inspection of semiconductor integrated circuit devices is to be reduced. Reinforcements having a substantially equal linear expansion ratio (coefficient of thermal expansion) relative to a wafer to be inspected are formed over an upper face of a thin film probe, grooves are cut in the reinforcements above the probes, a first elastomer which is softer than a second elastomer is so arranged as to fill the grooves and overflow the grooves by a prescribed quantity, a glass epoxy substrate, which is a multi-layered wiring board, is fitted over the second elastomer, and pads provided over an upper face of the glass epoxy substrate and bonding pads which are part of wirings belonging to the thin film probe are electrically connected by wires.
申请公布号 US7235413(B2) 申请公布日期 2007.06.26
申请号 US20040968431 申请日期 2004.10.20
申请人 RENESAS TECHNOLOGY CORP. 发明人 HASEBE AKIO;NARIZUKA YASUNORI;MOTOYAMA YASUHIRO;SHOJI TERUO
分类号 G01R1/073;H01L21/66;G01R3/00;G01R31/26;G01R31/28 主分类号 G01R1/073
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