HIGH SPEED INTERFACE SEMICONDUCTOR DEVICE AND METHOD THERE-OF

摘要

A high speed interface semiconductor memory device and a method thereof are provided to reduce circuit area and power consumption by using a quadrature strobe signal. A clock signal generation circuit generates a first and a second clock signal having a phase difference of 90 degrees. A first group data transmission circuit(310) multiplexes and transmits first group data in response to the first and the second clock signal. A second group data transmission circuit(320) multiplexes second group data in response to the first and the second clock signal. A first strobe signal transmission circuit(330) transmits a first strobe signal based on the first clock signal. A second strobe signal transmission circuit(340) transmits a second strobe signal based on the second clock signal. At least one of the first and the second strobe signal transmission circuit controls the phase of a corresponding strobe signal, on the basis of data error information fed back from a receiver semiconductor device.