发明名称 MANUFACTURING METHOD FOR BIT LINE IN SEMICONDUCTOR DEVICE
摘要 A method for forming a bit line in a semiconductor device is provided to reduce resistance of a bit line contact by forming a bit line on a lower portion of a trench oxide layer in a stacking relation with an ion implanted layer and a metal layer. A trench(T) is formed on a substrate(11), and a bottom surface of the trench is implanted with ions to form a bit line(12). A tungsten layer(13) is formed on the bit line, and an oxide layer is deposited on the tungsten layer. The oxide layer is planarized to form a trench oxide layer(15) in the trench. The bit line is formed by implanting ions into the bottom surface of the trench in energy of 50KeV.
申请公布号 KR20070064720(A) 申请公布日期 2007.06.22
申请号 KR20050125110 申请日期 2005.12.19
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 ROH, JIN GYU
分类号 H01L21/28 主分类号 H01L21/28
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