| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of improving operational reliability, and capable of contributing to realizating to high-speed operation by suppressing short-circuitings among memory cells. <P>SOLUTION: A capacitor 102 employs an impurity region, formed below the capacitor 102 in an active region 7 as lower electrode. The upper electrode 22 of the capacitor 102 is provided with a recess 10 on the side surface thereof. The recess 10 is provided on the active region 7. In another words, the width of upper electrode 22 in the section of the active region is narrower than that in the section of a separated region. Accordingly, when ions for forming the source/drain region of a MOS (metal oxide semiconductor) transistor are implanted, the ions can be implanted into the active region 7 that is further inside than the width W<SB>U2</SB>of the upper electrode 22. <P>COPYRIGHT: (C)2007,JPO&INPIT |
