| 摘要 |
A bit alterable memory device may include status bits such as a direction bit and two register bits for a colony of memory cells. The state of each status bit may be changed depending on the programming state of the non-volatile bit alterable memory. The status bits may be examined to determine the write status of two separate colonies of memory cells in the event of a power loss. The information gathered from the status bits can be used by a power loss recovery mechanism to determine whether the data written to a plurality of memory cell colonies is partially written. Applying a power loss recovery mechanism to a bit alterable memory can prevent the user from relying on data that is corrupt or otherwise unusable.
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