SURFACE CONTROLLED AVALANCHE SEMICONDUCTOR DEVICE

摘要

Surface controlled avalanche semiconductor device formed of a semiconductor body having a planar surface. The semiconductor body has an impurity therein so it has a conductivity of one type. Regions of opposite conductivity are formed in the body and provide P-N junctions which extend to the surface in such a manner that they form a pattern of a plurality of closed lines enclosing a plurality of small areas distributed over the surface with at least one portion of the surface being free of said P-N junctions and being in contact with said region of opposite conductivity type. A layer of insulating material overlies the surface. Source metallization is disposed on the layer of insulating material and extends through the layer of insulating material to make contact with said portion of the surface. Gate metallization separated from the source metallization overlies the layer of insulating material and the P-N junctions.