发明名称 REFERENCE VOLTAGE GENERATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a reference voltage generation circuit which reduces an influence of offset of a differential amplifier and responds to voltage reduction. SOLUTION: In the reference voltage generation circuit constituted by including: resistors R0, R0, R3; a differential amplifier A1; transistors Q1, Q2, Q3, connecting collectors of the transistors Q1, Q2 to a differential input terminal of the differential amplifier, commonly connecting one ends of the resistors R0, R0, R3 to output of the differential amplifier A1 and connecting the other ends of the two resistors R0 to the collectors of Q1, Q2, connecting the other end of the resistor R1 to a collector and a base of Q3 and connecting the base of Q3 to bases of Q1, Q2, emitter size ratio of Q1, Q2 is set to 1:N, voltage generated at both ends of the resistor R1 by superposing and supplying current approximately equivalent to Q1 or Q2 collector current and current having a positive temperature coefficient larger than that of the current approximately equivalent to Q1 or Q2 collector current and voltage by adding voltage V<SB>BE3</SB>between the base and an emitter of Q3 are output to the resistor R1. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007157055(A) 申请公布日期 2007.06.21
申请号 JP20050354872 申请日期 2005.12.08
申请人 ELPIDA MEMORY INC;HITACHI ULSI SYSTEMS CO LTD 发明人 FUJISAWA HIROKI;NAKAMURA MASAYUKI;TANAKA HITOSHI
分类号 G05F3/30;H03F3/34 主分类号 G05F3/30
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