发明名称 Wafer-level flipchip package with IC circuit isolation
摘要 Forming a wafer level chip scale flip chip package includes determining isolation requirements of an integrated circuit formed in a semi conductive substrate from package signal connections of the wafer level chip scale flip chip package. Operation may further include, based upon the integrated circuit characteristics, selecting a thickness of at least one dielectric layer isolating a top metal layer of the integrated circuit from the package signal connections of the wafer level chip scale flip chip package, determining a minimum pitch of the package signal connections of the wafer level chip scale flip chip package, and determining a maximum lateral distance from the signal pad to a servicing package signal connection of the wafer level chip scale flip chip package and determining a position of the servicing package signal connection of the wafer level chip scale flip chip package based upon the maximum lateral distance.
申请公布号 US2007139068(A1) 申请公布日期 2007.06.21
申请号 US20060375433 申请日期 2006.03.14
申请人 BROADCOM CORPORATION, A CALIFORNIA CORPORATION 发明人 BEHZAD ARYA R.;KAUFMANN MATTHEW V.;MACINTOSH MALCOLM;RAEL JACOB J.;CHEN HENRY K.
分类号 G01R31/26 主分类号 G01R31/26
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