| 摘要 |
The interface of a single-ended CMOS type signal to differential signal loads includes a LVDS load having a +Vin input and a -Vin input, a CMOS circuit having an output signal line, and a resistor Rt connected to the output signal line and ground. A 2.5 volt source line is connected through a resistor R1 to the -Vin input of the LVDS load, the output signal line is connected directly to the +Vin input of the LVDS load, and a resistor R2 and capacitor C1 re connected in parallel between R1 and the -Vin input and ground.
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