发明名称 MEMORY STRUCTURE AND MEMORY STRUCTURE ACTIVATION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a memory cell structure without gate leak current, and an activation method thereof. SOLUTION: The structure includes (a) a substrate, (b) first and second electrode regions 610, 1120 on the substrate, and (c) a third electrode region 1110 arranged between the first electrode region and the second electrode region. When a first write voltage potential is applied between the first electrode and the third electrode region, in response thereto, the third electrode region changes the shape of its own and then, when a predetermined read voltage potential is applied between the first electrode region and the third electrode region, in response thereto, a sense current flows between the first electrode region and the third electrode region. Further, when a second write voltage potential is applied between the second electrode region and the third electrode region, in response thereto, no sense current flows between the first electrode region and the third electrode region. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007158332(A) 申请公布日期 2007.06.21
申请号 JP20060322502 申请日期 2006.11.29
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 DAVID VACLAV HORAK;KOBURGER CHARLES W III;HAKEY MARK CHARLES;HOLMES STEVEN J;FURUKAWA TOSHIHARU
分类号 H01L27/10 主分类号 H01L27/10
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