LOGIC CIRCUIT MODEL CONVERSION DEVICE, LOGIC CIRCUIT MODEL CONVERSION METHOD, AND LOGIC CIRCUIT MODEL CONVERSION PROGRAM

摘要

PROBLEM TO BE SOLVED: To provide a technology for preparing a "logic circuit operation model" for achieving precision of RTL for achieving a verification purpose, and for setting a simulation execution time in an allowable range even in if a large-scale system. SOLUTION: This logic circuit model conversion device is provided with a model analysis part (110) for analyzing a model obtained by encoding a logic circuit of a register/transfer level and outputting same time blocks to be surely executed at the same time and analysis results; a common execution frequency group preparation part (120) for preparing a common execution frequency group as the set of codes whose execution frequency is made common on the basis of the same time blocks and the analysis results; a common execution frequency group analysis part (130) for analyzing the common execution frequency groups and preparing the expression of the general items of each register; a relation analysis part (140) for analyzing the interrelation of the common execution frequency groups and deriving the execution frequency of each common execution frequency group until a predetermined time; and a register value deriving part (150) for deriving the value of each register at the predetermined time from the expression of the general items and the execution frequency. COPYRIGHT: (C)2007,JPO&INPIT