| 摘要 |
Disclosed are a structure of a semiconductor device and a method of manufacturing the same. The distance between gate electrodes and capacitor upper electrodes is reduced so that, when spacer insulating layers are etched to form sidewall spacers, spacer insulating layers remain between the gate electrodes and the capacitor upper electrodes so as not to expose the silicon substrate. Therefore, when a silicide mask pattern is formed (in order to form a self aligned silicide layer in a subsequent process), it is possible to improve the process margin. Therefore, it is possible to prevent the gate electrodes from being damaged due to contact hole etching, which may be caused by misalignment of the silicide mask pattern, and prevent defects such as current leakage between a gate and a capacitor, unlike in the conventional art. As a result, it is possible to improve the reliability and yield of the semiconductor device.
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