发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a mask ROM capable of high-density and high-speed operation. <P>SOLUTION: A source line (SL) is arranged in common to the memory cells of adjacent rows, and a bit line (BL) is arranged for each memory cell row. A dummy cell (DMC) is arranged for each memory cell row. The dummy cell is constituted of a series of a first switching transistor (15) made conductive in response to a dummy word line (DWL) and a second switching transistor (17) for connecting an adjacent source line to a corresponding bit line in response to the potential of the source line (SL) of a corresponding row. The memory cell includes one transistor (10) and a data storage section (12) having mask wiring. During data reading, the source line potential of the selected row is changed, a differential potential is generated in the pair of a selected bit line (BLa) with which the selected memory cell is connected and a reference bit line (BLb) with which the dummy cell is connected, and the differential potential is detected to read data. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007157257(A) 申请公布日期 2007.06.21
申请号 JP20050352384 申请日期 2005.12.06
申请人 RENESAS TECHNOLOGY CORP 发明人 OKAMOTO KAZUYOSHI;YANAGISAWA KAZUMASA
分类号 G11C17/12 主分类号 G11C17/12
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