发明名称 Electronic device incorporating parylene within a dielectric bilayer
摘要 A technique for isolating electrodes on different layers of a multilayer electronic device across an array containing more than 100000 devices on a plastic substrate. The technique comprises depositing a bilayer of a first dielectric layer (6) of a solution-processible polymer dielectric and a layer of parylene (9) to isolate layers of conductor or semiconductor on different levels of the device. The density of defects located in the active area of one of the multilayer electronic devices is typically more than 1 in 100000.
申请公布号 GB0709093(D0) 申请公布日期 2007.06.20
申请号 GB20070009093 申请日期 2007.05.11
申请人 PLASTIC LOGIC LTD 发明人
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