发明名称 METHODS OF DESIGNING HIGH-VOLTAGE TRANSISTORS AND SEMICONDUCTOR DEVICES HAVING THE TRANSISTORS
摘要 A method for designing a high voltage transistor and a semiconductor device having the high voltage transistor formed using the same are provided to implement uniform performance regardless of the size and shape of the high voltage transistor by taking into account a gate width to control a separation distance between a high concentration impurity implantation region and an isolation layer. A separation distance between a high concentration impurity implantation region(11) and an isolation layer(3) is controlled by taking into account a gate width. A high voltage transistor includes a gate line across an active region defined by the isolation layer and a low concentration impurity implantation region(9) formed in the active region at both sides of the gate line. The high concentration impurity implantation region is formed in the low concentration impurity implantation region and separated from the gate line and the isolation layer, simultaneously. A sum of lengths of the low concentration impurity implantation regions, which are superposed with a straight line across the low concentration impurity implantation region and the high concentration impurity implantation region, is changed according to a gradient of the gate width.
申请公布号 KR100732637(B1) 申请公布日期 2007.06.20
申请号 KR20060048947 申请日期 2006.05.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, MYOUNG SOO
分类号 H01L21/74;H01L21/335;H01L27/10;H01L29/772 主分类号 H01L21/74
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