| 摘要 |
A flash memory device performing discontinuous bit line decoding is provided to prevent the generation of coupling between adjacent bit lines during a burst read operation. A flash memory device includes a memory cell array and a plurality of bit lines connected to the memory cell array. A decoding part decodes a logical column address to a physical column address in order for a bit line adjacent to a selected bit line not to be selected, when one of the bit lines is selected during a synchronous read mode. A gate circuit(1601) selects a part of the bit lines according to the physical column address.
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