发明名称 Variable memory refresh rate for DRAM
摘要 A method and apparatus for controlling a DRAM refresh rate. In one embodiment, a computer system includes a memory subsystem having a memory controller and one or more DRAM (dynamic random access memory) devices. The memory controller is configured to periodically initiate a refresh cycle to the one or more DRAM devices. The memory controller is also configured to monitor the temperature of the one or more DRAM devices. If the temperature exceeds a preset threshold, the memory controller is configured to increase the rate at which the periodic refresh cycle is performed.
申请公布号 US7233538(B1) 申请公布日期 2007.06.19
申请号 US20040909705 申请日期 2004.08.02
申请人 SUN MICROSYSTEMS, INC. 发明人 WU CHUNG-HSIAO R.;ZAK, JR. ROBERT C.
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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