Method and apparatus for completely covering a wafer with a passivating material

摘要

A method and apparatus for determining the complete coverage of a passivating material on the final conductive interconnection of a wafer containing integrated circuits. A test structure with the dimensions of the final interconnections of the integrated circuits is formed during manufacture of the integrated circuits and used to determine complete coverage of the wafer by creating an opening in the passivating material at the test structure, the size of the opening being indicative of the complete coverage of the wafer.