发明名称 Instructions for test & set with selectively enabled cache invalidate
摘要 A method and system for selectively enabling a cache-invalidate function supplement to a resource-synchronization instruction such as test-and-set. Some embodiments include a first processor, a first memory, at least a first cache between the first processor and the first memory, wherein the first cache caches data accessed by the first processor from the first memory, wherein the first processor executes: a resource-synchronization instruction, an instruction that enables a cache-invalidate function to be performed upon execution of the resource-synchronization instruction, and an instruction that disables the cache-invalidate function from being performed upon execution of the resource-synchronization instruction.
申请公布号 US7234027(B2) 申请公布日期 2007.06.19
申请号 US20010045591 申请日期 2001.10.24
申请人 CRAY INC. 发明人 KOHN JAMES R.;BAIRD ROBERT J.
分类号 G06F12/00;G06F9/30;G06F9/38;G06F9/52;G06F12/08 主分类号 G06F12/00
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