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发明名称
SYSTEM MIT EINEM SIGMA-DELTA-MODULATOR ZUR ERZEUGUNG EINER DIGITALEN DARSTELLUNG EINES QUOTIENTEN (P-Q)/(P+Q)
摘要
申请公布号
AT362142(T)
申请公布日期
2007.06.15
申请号
AT20040708842T
申请日期
2004.02.06
申请人
KONINKLIJKE PHILIPS ELECTRONICS N.V.
发明人
IMMINK, ALBERT;VAN DEN HOMBERT, JOHANNES;STEK, AALBERT
分类号
G06J1/00;G11B7/09
主分类号
G06J1/00
代理机构
代理人
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地址
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