发明名称 |
Field effect transistors having elevated source/drain regions and methods of manufacturing the same |
摘要 |
Methods of manufacturing a field effect transistor include forming a gate pattern on a substrate. A gate spacer is formed on a sidewall of the gate pattern. A first layer is formed from a surface of the substrate and contacting the gate spacer using a first selective epitaxial growth (SEG) process at a first temperature. A second layer is formed from a surface of the first layer and contacting the gate spacer using a second SEG process at a second temperature. The second temperature is lower than the first temperature. The first and second layers define elevated source/drain regions.
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申请公布号 |
US2007134880(A1) |
申请公布日期 |
2007.06.14 |
申请号 |
US20060636139 |
申请日期 |
2006.12.08 |
申请人 |
KANG MIN-GU;KIM KI-HONG;KIM JIN-BUM;WON JUNG-YUN;JUNG IN-SUN |
发明人 |
KANG MIN-GU;KIM KI-HONG;KIM JIN-BUM;WON JUNG-YUN;JUNG IN-SUN |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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