发明名称 Suppression method and structure for reducing a via stub effect of a substrate
摘要 A suppression method for suppressing a via stub effect of a substrate is disclosed. The suppression method is applicable to a substrate having a via, a first conductive line and a second conductive line connected through the via to the first conductive line. The suppression method includes changing a first width of a first conductive segment of the first conductive line connected to the via, and changing a second width of a second conductive segment of the second conductive line connected to the via, so as to change impedances of the first conductive line and the second conductive line to match with a stub impedance of the via, reduce a parasite impedance of the via stub, reach an impedance match at a designed frequency point, and improve an integrity of a signal after traveling from the first conductive line, the via and the second conductive line.
申请公布号 US2007132527(A1) 申请公布日期 2007.06.14
申请号 US20060394695 申请日期 2006.03.31
申请人 INVENTEC CORPORATION 发明人 CHEN YEN-HAO
分类号 H03H7/38 主分类号 H03H7/38
代理机构 代理人
主权项
地址