发明名称 SEMICONDUCTOR INTEGRATED DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To stabilize an output from an I/O port output terminal even on the occurrence of a decrease in a low potential power supply output in a multi power supply microcomputer system using two kinds or more of power supplies. <P>SOLUTION: For example, a CPU 20 is connected between a low potential power supply terminal 11 and a ground potential power supply terminal 13 and a prescribed low potential power supply output (VDDL) is supplied to the CPU 20 via the low potential power supply terminal 11. When a low potential power supply&test mode detection circuit 23 detects a decrease in the low potential power supply output, a level shifter circuit 24 is controlled by a detection output (CLRV) of the circuit 23. Thus, an output level of a peripheral PORT circuit 25 receiving an output from the CPU 20 is controlled to maintain a state before the low potential power supply output is decreased. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007150987(A) 申请公布日期 2007.06.14
申请号 JP20050345530 申请日期 2005.11.30
申请人 TOSHIBA CORP 发明人 OIKAWA KIYOHARU
分类号 H03K19/0185;G06F15/78;H01L21/822;H01L27/04 主分类号 H03K19/0185
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