发明名称 Data processing in which concurrently executed processes communicate via a fifo buffer
摘要 A processing circuit executes a data producing process and a data consuming process. The data producing process produces a stream of data, the data consuming process consumes the stream of data concurrently with production of the stream. A first-in first-out buffer passes data from the stream between the data producing process and the data consuming process. The buffer comprises buffer memory, the buffer writes data-items from the stream in circular fashion into the buffer memory. A consuming process interface is arranged to process a command for making a data grain from the stream available to the data consuming process. The interface responds to the command by testing whether addresses of data within the grain to which access has to be gained wrap around in the circular FIFO buffer. The interface copies the grain from the FIFO buffer to the auxiliary memory region, on condition that the addresses wrap around, so that the wrap around is eliminated in the copied grain, The interface returns an indication to the consuming process to read the grain from the FIFO buffer when the addresses do not wrap around inside the grain, or an indication to read from the auxiliary memory region, when the addresses wrap around.
申请公布号 US2007133399(A1) 申请公布日期 2007.06.14
申请号 US20040552778 申请日期 2004.04.08
申请人 GANGWAL OM PRAKASH 发明人 GANGWAL OM PRAKASH
分类号 H04L12/26;G06F5/10;H04L12/50 主分类号 H04L12/26
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